Wednesday, December 05, 2012

Boost Regulator Powering Small White LEDs

My short contract turned out to last from March until November. Great for the paying the bills, lousy for getting anything else done. It was a decent gig, I got to do lots of things. Everything from writing and synthesizing Verilog, to block level analog verification, to top level mixed-signal verification, to Perl/Tk for a simulation environment, and creating a PSpice model to round the contract out. I had never done high level modeling in PSpice before, so I got to do a variety of things I've done before and something new. Not too bad. 

I have decided to publish this blog on a monthly basis; I intend to publish on the first Wednesday of each month. I should be able to keep up that pace even if I am in neck deep in a contract. Since I am briefly between contracts, I will write several blog entries ahead. I might even proofread them if I write them ahead of time like that. 

Enough administravia, on to some design!

I am revisiting and finishing the LED lighting system for a boy scout trailer. As you might recall, the challenge is to place a robust, low power lighting system inside a boy scout troop equipment trailer. The lighting system will be powered by a 12V lead acid battery that may only get charged for a couple of hours each month. the lights need to usable for two nights of camping in between those charges. Low power (30-40mA) white LEDs seem like a good way to handle this. 

To simplify the wiring to the LEDs, the LEDs are connected in series. Only two wires need to be connected to the LEDs from the control box this way. I want to keep the highest potential present in the system below about 40V. The white LEDs I chose have a maximum forward voltage drop of up to 4.4V. So eight in series. 

I am using the National Semiconductor (now Texas Instruments) LM2585 boost regulator controller. It's a nice chip for this application. It is simple to use, has a low pin count, and has more than enough power capability. The LM2585 datasheet recommends using TI's WEBENCH Power Designer. This is a nice tool, I like it's power, it's simplicity, and it's wealth of produced information (even a suggested parts list). However, it requires a more recent version of Adobe Flash than I have bothered to install on my Linux computer, so I had to shift over to my Windows laptop to use it, and I didn't really get the feel of the circuit. Since I am using the regulator in a current feedback mode, the simulations can't be made to do what I'm going to do. So it's a great system but I had to fiddle a bit with it's results before I was comfortable. Of course, I checked the results with hand calculation to make sure they made sense. 


Figure 1. LM2585 30mA LED driver.
There isn't much to say about this. It is close to the standard application schematic except that the feedback point is taken at the top of a 41Ω current setting resistor. The LM2585 will try to control the out voltage to maintain 1.23V at the FB node (1.23V/41Ω=0.03A). The 36V zener diode across the output keeps the voltage from increasing wildly if the chain of LEDs is broken. I have tested this by intentionally opening one of the LED connections. By the slight smell, I can tell this is straining the capacitor and the circuit is none too happy about that operating mode, but it is keeping the circuit from actually blowing up. Bursting into flames is almost always a bad thing.

I put this circuit together on a generic PC board as poorly shown in figure 1. The close up in figure 2 shows that my way of making a surface mount inductor into a through hole inductor. Just solder a couple of wires to it.

Figure 1. The physical implementation. The 1mH inductor is almost as large as the rest of the circuit. 


Figure 2. Now it is a through hole inductor.



Figure 3 shows a scope shot of the circuit in operation.

Figure 3. Scope shot. Channel 1 (yellow) is SWITCH. Channel 2 (blue) is FB. Channel 3 (purple) is OUT. Channel 4 (green) is IN. The too large capacitor (22uF) keeps the output level. 



When I started this project, I assumed getting the LED regulator going would be most of the work. I was wrong. Next time I will show what I came up with for the on/off switch. That turned out to be more complex. In fact, the installment after next will be the program for the micro-controller that is becoming part of the switch. 

Figure 4. The whole circuit on my dining room white board.


Next month, the on/off switch circuit and a complete parts list. Until then, I hope I'm doing someone besides myself some good. Good luck on your own projects!

By the way, does anyone out there know how to submit Design Ideas to EDN? I couldn't quickly find the submission guidelines online or in the print magazine. 

Bruce


Wednesday, May 23, 2012

Design Notes: Op-amp Stability Analysis in SPICE

Op-amp stability analysis involves getting an DC operating point with the amplifier running normally then opening the feedback loop and getting small-signal AC information. This can be done by using a very large inductor to pass DC and block AC and a very large capacitor to pass AC and block DC, but I've only seen it done that way once (and that was just last week, go figure).
HSPICE and many of its relatives, including SmartSpice, have the ability for a resistor to have a different value depening on if the simulation is DC (like an operating point analysis) or AC. The schematic below shows a simple way to accomplish this. This even works with Cadence's analogLib res, but I have not gotten it work with Cadence's analogLib resBias. But if you have access to Cadence you probably want to use the stb analysis and skip all of this. 


The listing shown here is for Silvaco's SmartSpice. HSPICE isn't that different. 


.option
+ post=1
+ measout
+ nomod
+ unwrap=1
+ usedegrees
+ savemfiles=1
+ savemodelslog
+ ingold=1
.temp 25
.AC DEC 50 10 10000meg
.LET AC mGAIN = vdb(out)-vdb(pos)
.LET AC mGAINM = -(vdb(out)-vdb(pos))
.LET AC mPHASE = vp(out, pos)
.LET AC mPHASEM = 180+(vp(out, pos))
.MEAS AC mGANMRG FIND mGAINM WHEN mPHASE=-180
.MEAS AC mPHSMRG FIND mPHASEM WHEN mGAIN=0
.MEAS AC mUGF WHEN mGAIN=0



There have been some some health problems in my family, so this was just a quick note to keep this blog weekly. I expect to have assembly and operation notes on the LED drivers next week. 

Bruce McLaren

Wednesday, May 16, 2012

Boost Regulator Soft Start

I am using the soft start circuit more-or-less straight from the LM317 datasheet

Soft Start using an LM317. Takes 300msec to reach 9V.

I started by adjusting the resistors to give a 9V output and use 1mA of bias current. It turns out the LM317 requires 10mA of output current to regulate. It's right there in the datasheet, but I missed it until I started to put the circuit together and couldn't figure out why it wasn't regulating. So I went for 10mA of current. Which seems like a lot. Maybe I should make an improved 317.

10mA. Ouch!

My intention is to soft start both the power supply for the compensator and the reference voltage. I used a diode model I had handy; I don't think the diode itself is particularly important.

Soft Start simulation results.


This entry is just a quick note. I ordered parts from Mouser and have started actually building the LED driver. I had trouble finding comparators of the needed speed at a price I could stomach. I'm going to try using the op-amps and only buy comparators if I need to. 

The approach to building the circuit will be to make the linear regulator with soft-start and use it to provide references. Then make the triangle-wave generator and see if I can really get a 400kHz triangle wave out it. Then make the boost regulator, but drive it from a pulse generator to check it out. Then pull the whole thing together. 

Then design a battery charger and interface and an on/off switch. Then install the beast in the trailer. 

I intend to publish photos of the building and verification process next week. I will also publish the schematic as it now is. I switched to direct current control and didn't document the change. It's not a big change, but it lowers the operating voltage and therefore the power requirements.

Late addition. I soldered the linear regulator and soft-start (and resoldered after finding I needed more LM317 current as explained above). I'm actually hitting 9.2V for input voltages above about 11V, that's less than 5% error.  The scope shot shows lower because my waveform generator only goes up to 10V. The soldering is not the best I've done. I could blame the re-solder, but I'm out of practice. I will have to do better when I put the triangle wave generator on here. I'm trying to decide if I use sockets for that part. It would make soldering safer.


9V regulator with soft start.

Soft start in operation. A bit faster than expected, but close enough. 


Miscellaneous tidbit for this week. I use this alias in my .cshrc.
alias big 'find . -type f -exec ls -s1k {}  \; | sort -gr | head'

And this one in a .bashrc.
alias big='find . -type f -exec ls -s1k '{}'  \; | sort -gr | head'

I don't remember now if the syntax is different for the different shells or just how they have drifted.
big gives a sorted list of the ten largest files in the current hierarchy


Bruce McLaren

Wednesday, May 09, 2012

Triangle Wave Generator

The part of the saw-tooth wave generator has been played by an ideal voltage pulse source in my boost generator schematics and simulations. It's time to make a "real" one. 

Note that a saw-tooth wave generator can be replaced by a triangle wave generator operating at twice the frequency. Think of a triangle wave as two back-to-back saw-tooth waves. So I need a triangle wave generator operating at 200kHz. 

This little circuit took me longer than I thought it would. I've designed triangle wave oscillator on chips in the 100kHz to 1MHz range. Doing this from components and keeping the capacitors large enough that I'm not worried about stray capacitance swamping the real capacitance has been a bit of a mind-bender for me. 

Triangle Wave generator schematic

In the schematic shown above, the comparator has significant hysterisis. On an IC, I am used to implementing that circuit using two pass gates (an analog multiplexor) selecting which reference voltage to apply to the positive input of the comparator. This is a smaller, simpler solution on a CMOS chip.  Two resistors are the smaller, simpler solution on a PCB. 

The 10Ohm resistor R4 was needed to get the circuit to converge. 
I needed to select a very small minimum time step to get the circuit to simulate accurately. This will cause trouble if I integrate this circuit in with the boost simulation. 

Triangle wave generator simulation. The light blue signal third from the top is the output.


This is actually operating at 448kHz. once stray capacitance has its way on what will be a hand soldered board, I wouldn't be surprised at 400kHz. That's still twice as fast as I expected. I will gladly re-do my calculations in return for a smaller inductor. 

Bruce

Wednesday, May 02, 2012

Boost Regulator

My first attempt at designing a boost regulator was comical. I took what I knew about SMPS (Switched Mode Power Supply) buck regulators and applied that. Then I figured out that running a boost regulator in CCM (Continuos Conduction Mode) creates a RHPZ (Right Half Plane Zero) that is not present in the buck regulator. That creates a circuit that is not stable. Did everybody get through that pile of acronyms? Then it's time to make something that works.

There are three basic approaches that I could take. 
1) I could design it to run in DCM (Dis-continuos Conduction Mode), where the inductor is small enough that it is fully discharged before the end of the cycle and the current is drawn from the capacitor. This requires a bit of finesse in component sizing, load current specification, and feedback network setup. It could make sense for this application because the load current has a narrow expected range.

2) I could stick with CCM but roll the response off at a fairly low frequency. This works for this application because I'm driving LEDs through a current regulator. The load current will change very slowly, mostly with temperature.

3) I could make sense of this paper or similar and keep a high bandwidth while retaining CCM. That isn't needed for this application. Maybe next time. 

First, the most important stage of any design, the specification. You can't design something if you don't know what you're designing.

Parameter Minimum Typical Maximum
Input Voltage 10 V 13.8 V 20 V
Output Voltage 40 V 44 V 48 V
Output current 36 mA 40 mA 44 mA

That's all that really matters. The input voltage minimum and maximum are somewhat arbitrary. The output voltage needs to be at least 40V to allow for the worst case corner, +/-10% seemed reasonable, so I set the maximum 20% higher. The frequency should be higher than 200Hz to avoid visible flicker, but I'll want much higher to keep the inductor size reasonable. 
Very simplified Bode plot for the boost control to output gain

The frequencies fLC, fZ, and fESR are from the output stage. The fC frequency is where the feedback system will get the crossover frequency to be. The crossover frequency needs to be at least three times higher than fLC so the peaking doesn't mess with it too much. fC also needs to be at least 1/3 of the lowest fZ. fZ needs to be at least 10*fLC.
Time for some numbers now.

The duty cycle is D ≈ (Vout−Vin)/Vout = 50-79%, 69% typical.

The minimum inductor size needed stay in continuous conduction mode with a 100kHz switching frequency is
L ≥ (Vout D (1−D)2)/(2 Iout f) = 156-347μH I choose 750μH.

The minimum capacitor to keep the output ripple to less than, say, 1V is
C ≥ (Iout D)/(ΔV f) = 0.035μF choose 1μF because that seperates fLC and fZ.

Therefore
fLC = (1-D)/2π (LC)1/2 = 1210-2910 Hz, 1.8k Hz typical.
fZ = (Vout/Iout) (1-D)2/(2π L) = 10.1-58.4 kHz, 23 kHz typical.
I'll want fC to be about 8kHz.

FESR = 1/(2π CRESR) = 320kHz (I assumed 500mΩ)

DC Gain is 20*log(Vout/((1-D)Vramp) = 43dB.
Gain at fC (8kHz) is about 18dB.

So the feedback compensation needs to provide a couple of zeros at about 3/4fLC or 1.35kHz, a couple of poles at fESR or 320kHz and attenuation of about -18dB at about 8kHz.

The next table summarizes this in terms of component values. I made a spread sheet to do the actual calculations.

Compensator values
ParameterFormulaNumbersResultStd Value
GZGC-(20*Log(fZ/(3/4fLC)-18dB-(20*10^(23kHz*0.75*1.8kHz))-46dB
R1picked200kΩ200kΩ200kΩ
RZ2R1*10^(GZ/20)200kΩ*10^(-43dB/20)1.50kΩ1.5kΩ
CZ21/(2π RZ2 3/4fLC)1/(2*3.1416*1.0kΩ*0.75*1.8kHz)77.6nF75F
CZ31/(2π R3/4fLC)1/(2*3.1416*200kΩ*0.75*1.8Hz)582pF470pF
Cp11/(2π RZ2 FESR)1/(2*3.1416*1.0kΩ*320kHz)334pF470pF
Rz31/(2π CZ2 FESR)1/(2*3.1416*0.68μF*320kHz)1.064kΩ1.0kΩ

The inductor is larger than I'd like, but it is set by the basic specifications. I don't think I can easily make a triangle wave generator faster than 100kHz on a PCB (this will be a breadboard style project, no custom PCB will be purchased). Raising that frequency would allow a smaller inductor.

Schematic is below. This is obviously not the implementation schematic. I am using ideal op-amps, comparators, and saw-tooth wave generator. The resistors on the the op-amp outputs helped initial convergence. The highest value comped (the output of the feedback loop) can take is 9V. The saw-wave switches between 0V and 10V. This means the gate signal will always be switching, even when the feedback is saturated to its rail.

Simulation schematic for boost regulator.


A simulation showing typical operation is below. The current through the LED legs is in blue, the voltage output (pwr) is in green on the right axis, the inductor current is in orange on the left axis. The pwr output overshoots then settles to 44V. The currents are controlled at 18mA in each leg. Not too bad; I may want to raise the LED currents. I do not understand the quick drops to ground that the pwr signal does every now and then. When zoomed in on, they drop in one time step which suggests a simulation issue. I'm not certain of that, though. The 10V case input gets the output voltage up past 40V which meets spec, but it is no longer regulating. I'm going to call that good enough; low voltage operation works, but not well.

Simulation results for 10, 13, and 20V batteries.

Zoom in to show inductor current. I'm going to need a hefty inductor to handle 400mA continuous. 

The next steps are to find real components that can be used and design a saw-tooth generator. I will probably use a triangle wave generator running at twice the frequency. This would be trivial for me on and IC, but I haven't done it using components before. "It shouldn't be too bad." I'm still thinking through how best to ensure the triangle-wave always has a peak higher then feedback network's high saturation point. I will also need to either make a soft-start or a voltage limiter. 80V initial transient is a bit large, and I wouldn't be surprised if the real (non-simulation) peak is even higher. I am also considering removing the LM317 based current sources and instead controlling the current directly.


I found several good references while working to understand boost converter stabalization.

Loop compensation of voltage-mode boost converters This stepped through the design process in a organized and understandable fashion. If I had found this first instead of last, I would not have had much trouble.

Compensating the RHPZ in a CCM Boost Converter: the analytical way This is part three of a four part series that is pretty good, but hard to follow because the equations and figures are not in-line with the text.

DC/DC Boost Calc This is a quick and dirty component calculator.


I'm making some progress on this project. I would like to finish up the design in nest week's blog. What I expect to do is write an entry on miller op-amp compensation or ADC specifications because I need to prepare for a technical phone interview.

Bruce

Wednesday, March 21, 2012

IC Design Interview 5: Latch-up

IC Design Interview 4 is the Folded Cascode Op-amp. I don't have it ready yet, so I'm moving on to latch-up.


Preventing latch-up is easy, until it isn't. The guidelines are to tie the substrate to the lowest potential on the chip and the n-wells to the highest potential on the chip. And tie them well. In metal. As often as practical. Easy enough. Except for that input pair whose well isn't tied to the supply. Or the chips with multiple supplies.
It helps to understand what is happening in the chip during latch-up. Devices you didn't put in there are poking their very real heads up and saying, "Boo!" The diagrams below show the parasitic devices in red superimposed over the devices that are supposed to be there. Notice that you cannot make the parasitic devices go away, you can only make them not turn on.





Latch-up will occur if
  • supplies can sustain latch-up current
  • loop gain ≳ 1, i.e., βnpnβpnp ≳ 1
  • Base-Emitter junction forward biased

The BE junction will forward bias if
  • either drain taken beyond its respective supply
  • the current or resistor is large enough to create a large voltage drop 

The usual line of attack is to keep those resistors as small as possible. This is usually relegated as a layout task. A good layout person will do a good job with it. As a designer, you have to review the layout and verify it occurred. There should be a ring of n+ tied to the power supply surrounding each well. There should be a ring of p+ tied to ground surrounding each substrate region.  The substrate and well ties do not generally require much DC current. You may be able to make the ties on separate metal runs from the active supplies. Do so if you're allowed to. Don't be afraid to separate wells tied to different potentials by a bit more than the required distance.

It is sometimes possible to insert a resistor in the supply path so the supply can not sustain the latch-up current. This actually can work in very low power chips where a fairly large resistor has a low voltage drop. This isn't usually an option, but I have seen it work. 


Random tip from my current day job.
The time printing via the Verilog %t format can be made more human readable by using the $timeformat command. For example, $timeformat(-6, 3, "us", 13); placed inside a begin-end block makes my job easier.

Until next week,
Bruce

Wednesday, March 07, 2012

IC Design Interview 3: Bandgap Reference

Life has intruded so not much update on the boost converter. I do now understand there is a brand new shiny zero that has to be taken care of. I also now understand the gate drive needs to forced to oscillate at some duty cycle regardless of the output value. I need to rework the feedback compensator to account for the boost AC characteristics instead of the buck that is in there now. Until I have that ready, here's some more interview notes.


The bandgap equations must be derived sometime during every integrated circuit design interview. At least it seems that way. It is a standard, useful circuit found in nearly every chip. I think the discussions about the circuit are better able to gauge a candidate's knowledge and experience, though. 

Start with a schematic like the one shown below. 




That last equation isn't the final answer, though I've never been asked in an interview to go beyond it. VBE has a negative temperature coefficient and the VT has a positive temperature coefficient so appropriate values of resistors and bipolar multipliers can be found.In general R1 and R2 are made equal. Then the bipolar multipliers are set based on layout. Pick a rectangular array that allows Q1 and Q2 to be arranged in a common centroid configuration. Then set the ratio of R1 and R2 for zero temperature coefficient.

There are at least four other sub-topics that I will put off until a later blog entry.

  • Current conveyor instead of an op-amp
  • Lower voltage reference
  • Producing a VPTAT (Voltage Proportional To Absolute Temperature)
  • Start-up issues
Bruce McLaren

Wednesday, February 29, 2012

Boost for LEDs

I need to light the inside of a trailer used to haul camping equipment for my son's Boy Scout troop. I've discussed this with the adult quartermaster at some length. We have agreed small white LEDs placed about every 30cm around the top inside perimeter should provided sufficient illumination without being so bright as to completely ruin night vision. 
My original idea was to to use an LM317 regulator configured as a current source to drive two groups of two LEDs (four LEDs per regulator). My previous blog entry discussed one way to achieve this.  That design had several problems.
  • Needs 11.1V to operate at worst case corner.
  • Lots of wiring needed to connect LEDs to regulator.
  • Several regulators needed around the trailer.
I decided a better design would include a DC-DC boost regulator to boost the battery voltage to 40V. Two LM317 configured as current regulators would then each drive a string of eight LEDs with 20mA current as shown in the schematic. I chose 20mA because the LEDs are sufficiently bright at that current and it is significantly below the maximum specification of 35mA. Eight LEDs at the maximum forward voltage of 4.4V still allow 4.8V of dropout in the current regulator.

The 40V supply could be provided from a capacitor charge pump or a switch mode chip. Since I want to actually design and implement the circuit myself, I chose to ignore these simpler, cheaper, and more rational alternatives. Basically, I want to solve this problem using a switched-mode boost converter because I've never designed or worked with a switched-mode boost converter. I expect to learn some things along the way. So let's dive into a switch mode DC-DC boost voltage regulator from components.

First, the most important stage of any design, the specification. You can't design something if you don't know what you're designing.

Parameter Minimum Typical Maximum
Input Voltage 10 V 13.8 V 20 V
Output Voltage 40 V 44 V 48 V
Output current 36 mA 40 mA 44 mA

That's all that really matters. The input voltage minimum and maximum are somewhat arbitrary. The output voltage needs to be at least 40V to allow for the worst case corner, +/-10% seemed reasonable, so I set the maximum 20% higher. The frequency should be higher than 200Hz so any brightness variation isn't visible.

The schematic you find plastered all around the internet is shown here. It is wonderful if what you want to do is discuss operation principles or interview someone. It is woefully incomplete if you want to design a regulator.

Oversimplified boost schematic

The next schematic is what I've put together to actually design from. It is largely gathered from a special topics course Dr. Abhiman Hande taught at UTD during the fall of 2008, I am especially leaning on Ian Lopez's excellent final report. I know using a MOSFET instead of the schoktty diode would improve the efficiency, but I am sticking with that simplification for now. 
Simulation schematic


Let's do some calculating.

The duty cycle is D ≈ (Vout−Vin)/Vout = 50-79%, 69% typical.

The minimum inductor size needed stay in continuous conduction mode
L ≥ (Vout D (1−D)2)/(2 Iout f) = 4.8mH I choose 6.8mH.

The minimum capacitor to keep the output ripple to less than, say, 1V
C ≥ (Iout D)/(ΔV f) = 0.035μF choose 1μF because I have several of that size laying around.

fc = 1/(2 π √(LC)) = 1.9kHz

Let's zoom in on the compensator. The textbooks refer to this as a "Type III" compensator. I'm used to it being a "PID" controller. Whatever you like to call it, I certainly need the feedback circuit.
Compensator schematic

Compensator values
Parameter Formula Numbers Result Std Value
R1+R2 Vout/Iref 44V/1mA 44kΩ
R1 Vfb/Iref 1.2V/1mA 1.2kΩ 1.2kΩ
R2 R1+R2 - R1 44kΩ-1.2kΩ 42.8kΩ 43kΩ
fp1 fc*7.5 1.93kHz*7.5 14.5MHz
C2 1/(2 π R22 0.04) 1/(2*3.1416*43kΩ2*0.04) 2.17nF 2nF
fp2 1/(2 π CL CESR) 1/(2*3.1416*1μF*0.5Ω) 318kHz
fz1 fc 1.93kHz 1.93kHz
R3 (fz1*R2)/(fp2-fz1) (1.93kHz*43kΩ)/(318kHz-1.93kHz) 261Ω 270Ω
C1 1/(2 π fp2 R3) 1/(2*3.1416*318kHz*270Ω) 1.92nF 1.8nF
fz2 fc 1.93kHz 1.93kHz
R4 1/(2 π fc C2) 1/(2*3.1416*1.93kHz*2nF) 41.2kΩ 43kΩ
fp3 0.75 fsw 0.75*100kHz 75kHz
C3 1/(2 π fp3 R4) 1/(2*3.1416*75kHz*43kΩ) 49pF 51pF

Two useful pages that list standard resistor and capacitor values.
fp2 is set the cancel the ESR zero. At least that's what the textbooks say. The capacitor ESR isn't a specified parameter, so it could be much higher or lower than this. But the pole needs to be set somewhere, so here it is.
fz1 and fz2 are set to cancel to cancel the poles at fc (1.6MHz).
Set fp3 to about 3/4 the switching frequency.
C2 should be much larger than C3

Some AC simulations are needed to verify this. But I'm impatient so I throw together a quick transient simulation just to do a quick check. And all you out there who know boost regulators already know the results. Vpwr=Vbatt-Vdiode. The problem is that if no switching is going on, it doesn't matter how the comparator is hooked up, the power transistor is either on or off and the feedback never crosses the reference. If switching isn't happening, it never starts. 

I didn't find any good references discussing this start up issue, so I'll have to figure a good solution myself. One quick solution is to simply ramp the reference voltage slowly. The current compensator and transient simulation is shown below.

compensator with ramped Vref

slow start-up, but at least it goes
There is much more switching noise than I expected, so I really need to verify those AC parameters. 

Looking at this start-up scheme, I also need to have a way to re-awaken the oscillations if they stop for some reason. Oh, well, more design work yet to be done! 

My son's Boy Scout Eagle project is this weekend and I have a short contract starting Monday so the next few entries here will be a bit brief. 

Until next week,
Bruce McLaren

Tuesday, February 21, 2012

LEDs Inside a Trailer

White LEDs are a good choice to light the inside of a boy scout trailer. They are low power. They do not produce too much light. They are inexpensive. They can be operated from a 12V battery. They are physically resilient.

The schematic shows four units of four LEDs and the associated circuitry. The unit can be repeated as many times as needed (four in this schematic). The LEDs are arranged in two parallel stacks of two series LEDs (2S2P). A stack of two LEDs will always operate with a battery voltage as low as 11.1V (4.4V for each LED, 1.3V across the resistor, 1V dropout). Two stacks will match close enough for this application while keeping the total current through the regulator below half it's rated capability. The LM317 is a nice adjustable regulator that I am using as a linear current regulator. Using a 33Ω resistor across the 1.2V reference results in 36mA of current. 

Schematic of four four LED units.


To implement this design, I obtained the following from Mouser. I bought 1000 resistors, so they are essentially free per piece. Each four LED unit costs $1.41, 16 LEDs costs $5.64.

Manufacturer Description Part Number Price
Cree White LED CP41B-WGS-CK0P0154 $0.30
Fairchild Adj. Regulator LM317LZ $0.17
Xicon 33Ohm 1/4W, 5% 291-33-RC $0.009

Construction

I breadboarded this circuit to get an idea of the brightness and so I would have a reference to drop LEDs into during construction to verify which direction they are pointing. I find these square LEDs difficult to orient.

One four LED unit on a breadboard.


The troop's adult quartermaster and I decided one light placed approximately every 30cm would be enough illumination for unloading the trailer at night. When I started to wire up the 16 or so LEDs that would be needed, I discovered this approach is a headache. Lots of branching and back and forth wiring is needed. Not a bad solution, but I can do better.

Next week I do better. Anyone for a boost switch mode DC-DC converter?

I've been listening to the Digikey/DesignNews "180 days of Education" For the last several weeks. The microcontroller lectures (the first two weeks) were worth the time. They are basic to intermediate level lectures well presented. The sensors lectures of the third week just didn't seem as useful to me. Probably worth listening to, but not necessarily. I will find the time to hear the next lectures.

Bruce McLaren

Tuesday, February 14, 2012

Dice Statistics

A change of pace: dice statistics. I am in the midst of rolling up a Dungeons and Dragons character. The DM said she would allow a method I was not previously familiar with:
Method VIII: The player assigns 24d6 among a character's six ability scores. Each ability score must have at least 3d6, but no more 6d6, devoted to it. If the player desires a character with a high Strength, he could devote 4d6, 5d6, or even 6d6 to that ability. Next, the appropriate number of dice are rolled for each ability, and the total of the three highest results become the score. Any and all other dice rolled for that ability are discarded.
The obvious action is for me to find the statistical distribution for 3d6, 4d6, 5d6, and 6d6. My brute force answer is to write a Perl script that generates all combinations of dice results, sums the three highest rolls, and records the distributions. I stuck the code at the end of this post. 

The two figures summarize the results in graphical form. In both graphs, the y-axis is percent (%). This is a nice demonstration of the difference between "most likely" and median. When rolling 6d6 and summing the best three, 15 is the most likely result but 14 is the median. 







The code is straight-forward. I couldn't think of a way to make the number of for loops variable, which kept the code easy to follow but not as general as it could be. This the first time I have found a use for a format statement. 



#!/usr/bin/perl

# high3.pl
#
# A D&D character creation method is quoted below
# Method VIII: The player assigns 24d6 among a character's six ability scores.
# Each ability score must have at least 3d6, but no more 6d6, devoted to it.
# If the player desires a character with a high Strength, he could devote 4d6,
# 5d6, or even 6d6 to that ability. Next, the appropriate number of dice are
# rolled for each ability, and the total of the three highest results become
# the score. Any and all other dice rolled forthat ability are discarded.
#
# This program find the distribution and cumulative distribution function for 
# rolling 3d6, 4d6, 5d6, and 6d6. 
#
# All possible combinations 1-6 are generated six times. For 3d6 only the 
# first three rolls are considered, for 4d6 only the first four rolls are 
# considered, etc. 
# The rolls are sorted and the highest three dice summed and recorded. 
#
# Bruce McLaren
# 11 Feb 12

use   warnings;
use   strict;

my $debug = 1;

my @roll     = ();  # [0-5] array containing the die rolls
# array of results. results[5]=number of times 5 came up
# [0-2] will remain 0
my @results3 = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
my @results4 = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
my @results5 = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
my @results6 = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
my $total    =  0;    # total possibilities = 6**6

for ($roll[0] = 1; $roll[0]<=6; $roll[0]++)
{
   for ($roll[1] = 1; $roll[1]<=6; $roll[1]++)
   {
      for ($roll[2] = 1; $roll[2]<=6; $roll[2]++)
      {
         for ($roll[3] = 1; $roll[3]<=6; $roll[3]++)
         {
            for ($roll[4] = 1; $roll[4]<=6; $roll[4]++)
            {
               for ($roll[5] = 1; $roll[5]<=6; $roll[5]++)
               {
                  $total++;

                  my @sorted3 = reverse (sort (@roll[(0..2)]));
                  my $result3 = $sorted3[0] + $sorted3[1] + $sorted3[2];
                  $results3[$result3]++;

                  my @sorted4 = reverse (sort (@roll[(0..3)]));
                  my $result4 = $sorted4[0] + $sorted4[1] + $sorted4[2];
                  $results4[$result4]++;

                  my @sorted5 = reverse (sort (@roll[(0..4)]));
                  my $result5 = $sorted5[0] + $sorted5[1] + $sorted5[2];
                  $results5[$result5]++;

                  my @sorted6 = reverse (sort (@roll[(0..5)]));
                  my $result6 = $sorted6[0] + $sorted6[1] + $sorted6[2];
                  $results6[$result6]++;
              }
            }
         }
      }
   }
}

if($debug >3)
{
   print "@results3[(3..18)]\n";
   print "@results4[(3..18)]\n";
   print "@results5[(3..18)]\n";
   print "@results6[(3..18)]\n";
   print "$total\t",6**6,"\n";
}

my $outindex = 0;
my $result3  = 0;
my $result4  = 0;
my $result5  = 0;
my $result6  = 0;
my $cdf3     = 0;
my $cdf4     = 0;
my $cdf5     = 0;
my $cdf6     = 0;

# All results are percentages taken to one decimal point
format STDOUT =
@>  @#.# @##.#  @#.# @##.#  @#.# @##.#  @#.# @##.#
$outindex, $result3, $cdf3, $result4, $cdf4, $result5, $cdf5, $result6, $cdf6
.

print " n   3d  3dcdf    4d 4dcdf    5d 5dcdf    6d 6dcdf\n";
for ($outindex=3; $outindex<=18; $outindex++)
{
   # results are multiplied by 100 to make them percentages
   $result3 = $results3[$outindex]/$total*100;
   $cdf3 += $result3;
   $result4 = $results4[$outindex]/$total*100;
   $cdf4 += $result4;
   $result5 = $results5[$outindex]/$total*100;
   $cdf5 += $result5;
   $result6 = $results6[$outindex]/$total*100;
   $cdf6 += $result6;

   write;
}

Here are the raw results (after passing through a StarOffice spread sheet).


n 3d 3dcdf 4d 4dcdf 5d 5dcdf 6d 6dcdf
3 0.5 0.5 0.1 0.1 0.0 0.0 0.0 0.0
4 1.4 1.9 0.3 0.4 0.1 0.1 0.0 0.0
5 2.8 4.6 0.8 1.2 0.2 0.3 0.0 0.1
6 4.6 9.3 1.6 2.8 0.5 0.8 0.2 0.2
7 6.9 16.2 2.9 5.7 1.2 2.0 0.4 0.7
8 9.7 25.9 4.8 10.5 2.2 4.1 1.0 1.6
9 11.6 37.5 7.0 17.5 3.8 7.9 2.0 3.6
10 12.5 50.0 9.4 26.9 6.0 14.0 3.6 7.2
11 12.5 62.5 11.4 38.3 8.6 22.5 5.8 13.0
12 11.6 74.1 12.9 51.2 11.3 33.9 8.9 21.8
13 9.7 83.8 13.3 64.5 13.6 47.4 12.1 33.9
14 6.9 90.7 12.3 76.9 14.9 62.3 15.1 49.1
15 4.6 95.4 10.1 87.0 14.3 76.6 16.7 65.7
16 2.8 98.1 7.3 94.2 12.0 88.6 16.2 81.9
17 1.4 99.5 4.2 98.4 7.8 96.5 11.9 93.8
18 0.5 100.0 1.6 100.0 3.5 100.0 6.2 100.0


Next week I may yet post the trailer LED circuit and implementation. Although my interview notes on bandgap voltage references are more likely.

Bruce McLaren

Wednesday, February 08, 2012

IC Design Interview 2: Miller Op-Amp

I sprinkle Miller op-amps around my designs. They are useful to drive low capacitance internal signal lines. They make fine buffer amplifiers. Many IC designers seem to be dead set against them, but I think they do have their place. Even those engineers who would never use a Miller op-amp and spend a fair amount of time during the interview explaining why no one should ever use them will expect good knowledge of the structure, theory, and practice of design and use of the lowly Miller op-amp.

These are my interview notes so they only cover the things I tend to forget, i.e., the equations.



I am hoping to have interior trailer lights ready for next week.

Bruce McLaren

Saturday, February 04, 2012

IC Design Interview 1: Basic Device Equations

I've been on both sides of the hiring desk and can say that interviewing for an IC design position is an interesting process. There aren't really that many of us, so we either know each other or know someone who knows the other. Everyone involved (the hiring manager, job seeker, other designers) is busy with things other than the interview. 

The usual process is for an interviewer to meet with the job seeker for an hour or so. This repeats about six times with a break for a group lunch. The interview is usually extremely technical in nature. There will be equations derived and schematics drawn. This seems to surprise people in other professions. 

I memorize equations poorly. This is bad when I know I will be required to recite a multitude of equations. These equations are basic to our profession and are used regularly, I just can't spit them out during an interview. So I spend several days ahead of the interview cramming as if for a test. I have prepared seven pages of basic information to be memorized before an interview with a few pages that I add on depending on the specific position. The first page of notes are the basic device equations. I present these here without explanation; the explanation would encompass an undergraduate electronics course.



I am still learning how to use google docs and embed the result in this blog.

Until next week.

Bruce McLaren

Wednesday, February 01, 2012

Introduction and Intention

A Mixed Signal by which I mean analog and digital. Or hardware and software.

I want to cover many technical and engineering related topics of interest to me. This blog will force me to put those ideas in an organized form. It will also be a place for me to store notes. I expect to be the only reader of this blog. The intent is to post every week.

Topics I want to cover:
Interview Notes--Things you must know to interview for an IC design position
Simple LED circuits
Basic IC Building Blocks
Power Converters