I've been on both sides of the hiring desk and can say that interviewing for an IC design position is an interesting process. There aren't really that many of us, so we either know each other or know someone who knows the other. Everyone involved (the hiring manager, job seeker, other designers) is busy with things other than the interview.
The usual process is for an interviewer to meet with the job seeker for an hour or so. This repeats about six times with a break for a group lunch. The interview is usually extremely technical in nature. There will be equations derived and schematics drawn. This seems to surprise people in other professions.
I memorize equations poorly. This is bad when I know I will be required to recite a multitude of equations. These equations are basic to our profession and are used regularly, I just can't spit them out during an interview. So I spend several days ahead of the interview cramming as if for a test. I have prepared seven pages of basic information to be memorized before an interview with a few pages that I add on depending on the specific position. The first page of notes are the basic device equations. I present these here without explanation; the explanation would encompass an undergraduate electronics course.
I am still learning how to use google docs and embed the result in this blog.
Until next week.